Analog Layout Engineer

Responsibilities:

1. Analog layout design
2. Participating in the layout of analog/mixed signal circuit
3. DRC/LVS/LPE verification, block/chip floor plan, power/clock distribution and chip assembly

Qualification:

1. BSEE degree with 2+ years
2. Familiar with Cadence layout design tools is required
3. Familiar with DRC/LVS/LPE tools is required
4. Familiar with CMOS analog IC schematics is required
5. Good organizational and problem solving skills
6. Good communication skill in English and Chinese