
Back-end Design Engineer
Huijing
Responsibilities:
- Implements IC design with emphasis on backend tasks, including Synthesis, floorplan, power planning, P&R, CTS, parasitic extraction, STA, and etc under division quality process and autonomously within work plan.
- Contributes to the definition of the technical documentation.
- Investigates initiates and puts in place new practices.
- Evaluates new tools/new technologies.
- Contributes to knowledge sharing within team and outside teams.
- Helps out with the training linked to deliverables such as design, train the trainers, etc.
- Tracks what is state-of-the-art knowledge of SoC design.
- Proposes new solutions and promotes them within division or across organizations.
- Participates with the peers in different domains to resolve problems.
- Reports and interfaces with other contributors to the project.
Qualification:
- MS degree in electrical engineering or related discipline.
- More than 3 years experience in backend SoC design with proven SoC tapeout experience.
- Expertise in Synthesis, floorplan, P&R, SI, LP design, CTS in deep sub-macro design.
- Experience in synopsys/cadence design tools and flows.
- Experience in data management tools such as DesignSync or Clearcase.
- Excellent knowledge in scripting languages (Perl, Tcl, Shell, …) and design languages (Verilog/VHDL).
- Strong timing closing and power optimizing capabilities.
- Excellent analytical, debugging and solving skill.
- Open mind, self-motivated, good communication skills and ability to excel in a team environment.
- Experience in Frontend and DFT is plus.
- Experience in Apache (power analysis) design tools and flows is plus.
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